StevenIC: Tips 'n Lifehacks of Design of Analog IC, Mixed-Signal IC (AMS) & RFIC (©Steven)

[Welcome to citing and linking to the pages of this blog] Summary of learning and practice of analog circuit, mixed-signal circuit and RF circuit designs, focused on their integrated circuit (IC) implementations. General knowledge learned from books, papers and practices are summarized. This blog also holds Job Hunting Guide, including interview questions, written by Fuding Ge.

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Tuesday, May 11, 2010

Nwell of pmos is connected to vdd or its source?

If nwell is connected to source:

Pros:
1. no body effect, so vth is smaller, then the device can be turned on more, and the resulting gain can be large;

2. there is no mismatch due to vth variance from body effect (vth variance due to other reasons still exist);


Cons:
1. layout size is large, since different pmos cannot share the save nwell;

2. possible transient forward biasing of pn junction formed by nwell and p+ source, when the signal is sharp and the resistance between source and nwell is not small;

 
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